coreboot/src
Julius Werner 679014bc84 veyron_jerry: Port CPU overshoot prevention
This patch ports commit 567f616f (rk3288: slowly raise to max cpu
voltage to prevent overshoot) to Veyron_Jerry. It also fixes include
ordering and some comment grammar in the affected code.

BRANCH=None
BUG=chrome-os-partner:32716
TEST=None

Change-Id: I9c0aba40ddd8a0852391df184034baa740d063df
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/228938
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-11-13 04:23:29 +00:00
..
arch arm64: psci cmd support 2014-11-12 19:57:38 +00:00
console console: add configs to support Marvell bg4cd uart 2014-10-17 03:24:42 +00:00
cpu urara: Fix CBFS header definitions 2014-11-11 18:02:20 +00:00
device PCIe: Add L1 Sub-State support. 2014-10-10 04:36:50 +00:00
drivers spi: do not use malloc in Winbond driver 2014-11-11 20:29:54 +00:00
ec chromeec: Add wakeup delay after SPI /CS assertion 2014-10-01 06:53:27 +00:00
include cbtables: Add RAM config information 2014-11-11 21:45:59 +00:00
lib cbtables: Add RAM config information 2014-11-11 21:45:59 +00:00
mainboard veyron_jerry: Port CPU overshoot prevention 2014-11-13 04:23:29 +00:00
northbridge Makefile: Preprocess linker scripts and other general improvements 2014-10-02 07:02:10 +00:00
soc t132: Increase space for romstage in memlayout 2014-11-13 03:14:47 +00:00
southbridge timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
superio superio: ite8772f: Exit extemp busy state 2014-09-27 07:09:25 +00:00
vendorcode vboot: fix invalid check for the returned value from spi_flash->write 2014-11-13 03:14:36 +00:00
Kconfig cbtables: Add RAM config information 2014-11-11 21:45:59 +00:00