Ensure that BSP has latest microcode loaded before MPinit starts. This aligns the code with other platforms ensuring that the microcode on the BSP is up to date. It likely has updated microcode before enabling NEM, so this is a nop, but it also ensures that the microcode is located in CBFS before the MTRRs are setup using x86_setup_mtrrs_with_detect() which removes caching the SPI flash MMIO area. Since intel_microcode_find() caches the microcode location get_microcode_info() will be faster since it doesn't need to access the CBFS. TEST=Lenovo X220 still boots. Change-Id: Ic4c5d1a06ce314b38b92e8a9c089ed901716ff27 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90893 Reviewed-by: Naresh <naresh.solanki.2011@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| amd | ||
| armltd | ||
| intel | ||
| power9 | ||
| qemu-power8 | ||
| qemu-x86 | ||
| via | ||
| x86 | ||
| Kconfig | ||
| Makefile.mk | ||