coreboot/src/include/cpu
Subrata Banik 5f941893ef cpu/x86/mtrr: Introduce mtrrlib with common MTRR helper functions
This change refactors MTRR handling by consolidating helper functions
from `earlymtrr.c` and `mtrr.c` into a new MTRR library (`mtrrlib`).
This approach improves code modularity and reusability, making these
utilities consistently available across different coreboot boot phases.

The following functions are now part of `mtrrlib`:

- `get_free_var_mtrr`: Retrieves the index of the first available
  variable MTRR.
- `set_var_mtrr`: Configures the variable MTRR, specified by an `index`,
  for a memory region defined by `base`, `size`, and `type`.
- `clear_var_mtrr`: Disables the variable MTRR at a given index.
- `acquire_and_configure_mtrr`: Acquires a free variable MTRR, configures
   it with the given `base`, `size`, and `type`.

BUG=b:409718202
TEST=Built and booted google/fatcat successfully.

Change-Id: Iba332b7088221fd930e973fad9410833bff184b9
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87539
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2025-05-08 16:51:17 +00:00
..
amd Revert "src/cpu,soc/amd/common/block/cpu: Add preload_microcode" 2025-04-14 13:55:47 +00:00
intel soc/intel: Add Wildcat Lake CPU and PCIe device IDs 2025-04-23 20:59:41 +00:00
power src/cpu/power9: move part of scom.h to scom.c 2023-04-18 13:05:56 +00:00
x86 cpu/x86/mtrr: Introduce mtrrlib with common MTRR helper functions 2025-05-08 16:51:17 +00:00
cpu.h x86: Separate CPU and SoC physical address size 2023-12-22 12:26:59 +00:00