Sean Rhodes 5eaf85d19b soc/intel/skylake: Use CSE reset status for reset ... send_global_reset() now returns cse_tx_rx_status, and skips the CF9 reset only when CSE reports CSE_TX_RX_SUCCESS. Test=Disable and enable the Intel ME on labtop_kbl and verify the system actually resets, rather than hanging. Change-Id: I5003ea9486a383ee7a4cace20ce6a54b0f94a166 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90274 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>		2025-12-11 00:11:12 +00:00
..
amd	soc/amd/glinda: Set FSP UPDs from devicetree for USB4	2025-12-09 16:26:13 +00:00
cavium	soc/cavium: Fix non matching types	2024-08-30 07:34:47 +00:00
example/min86	soc: Add SPDX license headers to Kconfig files	2024-02-18 02:03:37 +00:00
ibm/power9	soc/power9/rom_media.c: find CBFS in PNOR	2025-08-28 20:14:01 +00:00
intel	soc/intel/skylake: Use CSE reset status for reset	2025-12-11 00:11:12 +00:00
mediatek	soc/mediatek/mt8189: Correct AUX LDO mask bit definition	2025-12-09 18:27:23 +00:00
nvidia	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
qualcomm	soc/qualcomm/x1p42100: Add Dload mode detection and ramdump packing	2025-12-08 03:01:30 +00:00
rockchip	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
samsung	samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long'	2025-01-15 08:32:16 +00:00
sifive	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
ti	soc/ti/am335x: Remove superfluous formats	2024-08-02 14:45:13 +00:00
ucb/riscv	soc/riscv/ucb: Switch to FDT parsing to get memory size	2025-02-26 17:11:09 +00:00
xilinx	soc/xilinx/zynq7000: Initial Xilinx Zynq 7000 SoC bringup	2025-01-23 00:41:01 +00:00