Michael Niewöhner 5d1a328e88 soc/intel/cannonlake: add missing special function pads ... The following parameters do nothing else than configuring the corresponding pads to native mode: - DdiPortEdp - DdiPort*Hpd - DdiPort*Ddc - GpioDdp* - SpiGpioAssign - I2c*GpioAssign - SerialIoUartDebugEnable - Gp*GpioAssign - Uart*GpioAssign - GpioEnableHdaLink - AudioLinkDmic* - AudioLinkSsp* - GpioEnableHdaSspMasterClock - AudioLinkSndw* - SmbAlertEnable Add the missing special function gpio pad groups for CNL, to be able to configure them via gpio.h instead having to set various FSP parameters. The groups and names are documented in the PCH EDS, in Linux (linux/drivers/pinctrl/intel/pinctrl-cannonlake.c) and other places. Also, see soc/intel/tigerlake for reference. Change-Id: Ia3bc1df1a14dbca7c7213577cb2d5b98bb0acf64 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45211 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>		2020-09-17 21:53:38 +00:00
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alderlake	soc/intel/alderlake/romstage: Do initial SoC commit till romstage	2020-09-15 15:13:50 +00:00
apollolake	apollolake: Define MAX_CPUS at SoC scope	2020-09-09 10:35:34 +00:00
baytrail	soc/intel/baytrail: Add missing GSM size definitions	2020-09-08 05:34:55 +00:00
braswell	SMM: Validate more user-provided pointers	2020-08-21 07:51:07 +00:00
broadwell	soc/intel/broadwell: Drop gpu_panel_port_select	2020-09-08 05:26:25 +00:00
cannonlake	soc/intel/cannonlake: add missing special function pads	2020-09-17 21:53:38 +00:00
common	soc/intel/common/block/chip: Refactor chip_get_common_soc_structure()	2020-09-17 09:57:06 +00:00
denverton_ns	soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode	2020-09-14 07:02:26 +00:00
elkhartlake	soc/intel/elkhartlake: Update SA & PM related definitions	2020-09-08 05:30:44 +00:00
icelake	soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h	2020-09-14 12:06:39 +00:00
jasperlake	soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h	2020-09-14 12:06:39 +00:00
quark	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
skylake	soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode	2020-09-14 07:02:26 +00:00
tigerlake	mb/volteer: Select USE_CAR_NEM_ENHANCED_V2 for Tigerlake QS based	2020-09-17 19:04:28 +00:00
xeon_sp	xeon_sp/skx: Reorder pci_devs.h	2020-09-16 10:18:59 +00:00
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