Michael Niewöhner 5d1a328e88 soc/intel/cannonlake: add missing special function pads ... The following parameters do nothing else than configuring the corresponding pads to native mode: - DdiPortEdp - DdiPort*Hpd - DdiPort*Ddc - GpioDdp* - SpiGpioAssign - I2c*GpioAssign - SerialIoUartDebugEnable - Gp*GpioAssign - Uart*GpioAssign - GpioEnableHdaLink - AudioLinkDmic* - AudioLinkSsp* - GpioEnableHdaSspMasterClock - AudioLinkSndw* - SmbAlertEnable Add the missing special function gpio pad groups for CNL, to be able to configure them via gpio.h instead having to set various FSP parameters. The groups and names are documented in the PCH EDS, in Linux (linux/drivers/pinctrl/intel/pinctrl-cannonlake.c) and other places. Also, see soc/intel/tigerlake for reference. Change-Id: Ia3bc1df1a14dbca7c7213577cb2d5b98bb0acf64 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45211 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>		2020-09-17 21:53:38 +00:00
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amd	soc/amd/picasso: Clean up legacy UART config	2020-09-17 12:35:56 +00:00
cavium	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
intel	soc/intel/cannonlake: add missing special function pads	2020-09-17 21:53:38 +00:00
mediatek	soc/mediatek/mt8192: Init PLL in bootblock	2020-09-17 06:56:55 +00:00
nvidia	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
qualcomm	sc7180: report hardware watchdog reset after reboot	2020-09-16 00:44:09 +00:00
rockchip	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
samsung	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
sifive	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ti	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ucb