coreboot/src/soc
Vince Liu 4d3def7514 soc/mediatek/mt8189: Fix timer reset in BL31 by using time_prepare_v2
After reboot, the system does not need to serve pending IRQ from
systimer. Therefore, clear systimer IRQ pending bits in init_timer().
For that to work, the systimer compensation version 2.5 needs to be
enabled. Otherwise, inaccurate timestamps may occur after BL31, for
example in depthcharge. As the solution has already been implemented
in time_prepare_v2, mt8189 can adopt this version to fix the issue.

Also remove unnecessary headers in timer.c.

BUG=b:430211678
BRANCH=none
TEST=check the depthcharge timstamp in `cbmem` is correct.
 554:finished TPM enable update                        399,533 (12,059)
  90:starting to load payload                          399,541 (8)
  15:starting LZMA decompress (ignore for x86)         410,775 (11,234)
  16:finished LZMA decompress (ignore for x86)         465,472 (54,697)
  99:selfboot jump                                     487,643 (22,171)
  15:starting LZMA decompress (ignore for x86)         490,591 (2,948)
  16:finished LZMA decompress (ignore for x86)         502,153 (11,562)
  15:starting LZMA decompress (ignore for x86)         502,210 (57)
  16:finished LZMA decompress (ignore for x86)         504,510 (2,300)
1000:depthcharge start                                 534,769 (30,259)
1002:RO vboot init                                     534,813 (44)
1020:vboot select&load kernel                          534,815 (2)
1030:finished EC verification                          554,600 (19,785)
1060:finished AuxFW Sync                               560,740 (6,140)
1040:finished storage device initialization            612,960 (52,220)
1050:finished reading kernel from disk                 639,711 (26,751)
1100:finished vboot kernel verification                710,596 (70,885)
1102:starting kernel decompression/relocation          731,729 (21,133)
1101:jumping to kernel                                 945,034 (213,305)

Signed-off-by: Vince Liu <vince-wl.liu@mediatek.corp-partner.google.com>
Signed-off-by: Zhanzhan Ge <zhanzhan.ge@mediatek.corp-partner.google.com>
Change-Id: Ic79003b5a5b747a3761fd4612cad6a96ada216b6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2025-07-19 12:11:45 +00:00
..
amd soc/amd/common/cpu/noncar: Add bootblock overlap detection 2025-07-18 21:32:21 +00:00
cavium
example/min86
ibm/power9
intel soc/intel/apollolake: Add missing header in measured_boot.h 2025-07-18 21:30:19 +00:00
mediatek soc/mediatek/mt8189: Fix timer reset in BL31 by using time_prepare_v2 2025-07-19 12:11:45 +00:00
nvidia
qualcomm soc/qualcomm/x1p42100: Update boot critical firmware memory layout 2025-07-15 07:31:39 +00:00
rockchip
samsung samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long' 2025-01-15 08:32:16 +00:00
sifive tree: Remove unused <assert.h> 2024-11-19 00:40:04 +00:00
ti
ucb/riscv soc/riscv/ucb: Switch to FDT parsing to get memory size 2025-02-26 17:11:09 +00:00
xilinx soc/xilinx/zynq7000: Initial Xilinx Zynq 7000 SoC bringup 2025-01-23 00:41:01 +00:00