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soc/amd/common/cpu/noncar: Add bootblock overlap detection

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Currently overlaps with bootblock are not detected by our linker script.
So increasing the PSP_SHAREDMEM_BASE + size to an extent that would
overlap with bootblock would be just ignored.

Add another region for the sole purpose of detecting these overlaps.
This may not be the ideal solution, but should sufficient for now.

Also check that the actual loadable segment of bootblock does not use up
more space then that.

Tested: Check that GCC and Clang can still compile it and that the
loadable segment (and therefore what PSP loads into memory) does not
change.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I0f82f9b8655908676dc2d6545e72cb40fe9110e1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86862
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maximilian Brune 2025-03-15 14:48:35 +01:00 • committed by Matt DeVillier
commit 5cc4b9e6ce
1 changed files with 3 additions and 0 deletions
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3
src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
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@ -95,6 +95,7 @@ SECTIONS
PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE)
#endif
_ = ASSERT(BOOTBLOCK_END == ((BOOTBLOCK_END + 0xFFFF) & 0xFFFF0000), "Bootblock end must be 16 bit aligned");
REGION(bootblock_overlap_detection, BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE, 1)
ROMSTAGE(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE)
#if CONFIG(PLATFORM_USES_FSP2_0)
@ -214,5 +215,7 @@ SECTIONS {
BYTE(0xff);
} >resetsection
_ebootblock = BOOTBLOCK_END;
ASSERT(_ebootblock - _bootblock <= CONFIG_C_ENV_BOOTBLOCK_SIZE, "CONFIG_C_ENV_BOOTBLOCK_SIZE is not big enough")
}
#endif /* ENV_BOOTBLOCK */