coreboot/src
Gabe Black 4c394dfbce nyan: Implement the code which reads GPIOs for ChromeOS.
This file isn't used yet, but it will be turned on when the CONFIG_CHROMEOS
kconfig option is enabled.

BUG=None
TEST=With this and other changes, built and booted into depthcharge and saw
that it could find GPIO related information in the coreboot tables.
BRANCH=None

Change-Id: I92fa7f3c2602e3946ddeb8e6cdf3a09b7bfcf58a
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/173791
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
2013-10-20 08:35:47 +00:00
..
arch x86: add common definitions for control registers 2013-10-10 20:48:43 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00
device ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
drivers drivers/gma: remove unused code 2013-10-11 20:36:54 +00:00
ec chromeec: Implement full battery workaround at 6% 2013-09-16 23:31:17 +00:00
include coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00
lib coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00
mainboard nyan: Implement the code which reads GPIOs for ChromeOS. 2013-10-20 08:35:47 +00:00
northbridge PEPPY, Haswell: refactor and create set_translation_table function in haswell/gma.c 2013-10-01 17:56:28 +00:00
soc tegra124: Build source files into the various stges needed by CONFIG_CHROMEOS. 2013-10-20 08:35:44 +00:00
southbridge lynxpoint: Export pch_enable_lpc() for SuperIO systems 2013-10-11 03:57:57 +00:00
superio Drop prototype guarding for romcc 2013-05-10 11:55:20 -07:00
vendorcode vboot: provide empty vboot_verify_firmware() 2013-10-15 22:27:27 +00:00
Kconfig coreboot: config to cache ramstage outside CBMEM 2013-10-11 23:27:01 +00:00