Ronak Kanabar ffb5811b32 soc/intel/jasperlake: Update C-States info ... - Update C-States max latency values - Remove MSR programming for C-States latency BRANCH=None TEST=Boot to OS and check CState Latenecy >cat /sys/devices/system/cpu/cpu0/cpuidle/state*/{name,latency} POLL C1_ACPI C2_ACPI C3_ACPI 0 1 253 1048 Change-Id: I05c0b5b31d1883f72ca94171aa1b536621e97449 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40902 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-06-03 12:21:17 +00:00
..
amd	soc/amd/picasso/acpi: Add missing eMMC device	2020-06-03 12:15:54 +00:00
cavium	src: Remove redundant includes	2020-06-02 07:42:32 +00:00
intel	soc/intel/jasperlake: Update C-States info	2020-06-03 12:21:17 +00:00
mediatek	src: Remove redundant includes	2020-06-02 07:42:32 +00:00
nvidia	src: Remove redundant includes	2020-06-02 07:42:32 +00:00
qualcomm	src: Remove unused '#include <timer.h>'	2020-06-02 07:39:05 +00:00
rockchip	src: Remove leading blank lines from SPDX header	2020-05-18 07:00:27 +00:00
samsung	samsung/exynos5420: add resources during read_resources()	2020-05-14 21:27:34 +00:00
sifive	soc/sifive/fu540: Add chip_operations stub	2020-05-28 09:30:51 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00