coreboot/src
Furquan Shaikh 4b4c0c6016 northbridge/intel/sandybridge: Mask lower 20 bits of TOLUD and TOLM in hostbridge.asl
Lower 20bits of TOLUD and TOLM registers include 19 reserved bits and
1 lock bit. If lock bit is set, then systemagent.asl would end up
reporting the base address of low MMIO incorrectly i.e. off by 1.

This change masks the lower 20 bits of TOLUD and TOM registers when
exposing it in the ACPI tables to ensure that the base address of low
MMIO region is reported correctly.

Change-Id: Ib0ffd9a332fa9590de63f8828d30daa710fe50db
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41979
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2020-06-03 12:22:25 +00:00
..
acpi acpigen: Add some new helper functions 2020-06-03 04:06:14 +00:00
arch arch/x86/postcar_loader: utilize var_mtrr_context API 2020-06-02 16:10:05 +00:00
commonlib commonlib: Add CBFS_TYPE_BOOTBLOCK 2020-06-02 07:26:44 +00:00
console treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
cpu amd/microcode: Change equivalant ID width to 16bit 2020-06-02 18:55:01 +00:00
device src: Remove redundant includes 2020-06-02 07:42:32 +00:00
drivers arch/x86/postcar_loader: utilize var_mtrr_context API 2020-06-02 16:10:05 +00:00
ec src: Remove redundant includes 2020-06-02 07:42:32 +00:00
include acpi: Drop typoed __ROMC__ 2020-06-03 12:16:55 +00:00
lib fw_config: Add firmware configuration interface 2020-06-02 16:40:04 +00:00
mainboard mb/aopen/dxplplusu: Control SMI related FADT entries 2020-06-03 12:19:24 +00:00
northbridge northbridge/intel/sandybridge: Mask lower 20 bits of TOLUD and TOLM in hostbridge.asl 2020-06-03 12:22:25 +00:00
security src: Remove unused 'include <fmap.h>' 2020-06-02 07:42:40 +00:00
soc soc/intel/jasperlake: Update C-States info 2020-06-03 12:21:17 +00:00
southbridge sb/intel/i82371eb: Fix 16-bit read/write PCI_COMMAND register 2020-06-02 07:43:48 +00:00
superio superio/nuvoton/nct6779d: Open some LDN config registers 2020-06-02 08:02:48 +00:00
vendorcode vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3197 2020-06-03 03:59:08 +00:00
Kconfig fw_config: Add firmware configuration interface 2020-06-02 16:40:04 +00:00