coreboot/src/soc/intel
Kane Chen 472d0cb449 broadwell: fixed power gating enable for disabled sata port
The original code won't set power gating for disabled port correctly,
due to it must be set before Lock

BUG=chrome-os-partner:28234
BRANCH=None
TEST=build and boot on samus
     verify bit 24, 26 is set in RCBA(0x3a84) for samus

Original-Signed-off-by: Kane Chen <kane.chen@intel.com>
Original-Change-Id: Id78d391ac657665a972cb4fd1810df6304a5a6ab
Original-Reviewed-on: https://chromium-review.googlesource.com/213561
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Tested-by: Kane Chen <kane.chen@intel.com>
Original-Commit-Queue: Kane Chen <kane.chen@intel.com>
(cherry picked from commit 066c8c81df)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ic7c87b04863f93de5665d72e0f95b4105b1d4d3b
Reviewed-on: http://review.coreboot.org/8960
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-27 06:02:14 +01:00
..
baytrail bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
broadwell broadwell: fixed power gating enable for disabled sata port 2015-03-27 06:02:14 +01:00
common bootstate: use structure pointers for scheduling callbacks 2015-03-18 16:41:43 +01:00
fsp_baytrail intel/fsp_baytrail: Add PCI Root Port IRQ Routing 2015-03-12 20:35:49 +01:00
Kconfig broadwell: Hook into the build system 2014-12-31 21:23:09 +01:00
Makefile.inc broadwell: Hook into the build system 2014-12-31 21:23:09 +01:00