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coreboot/src/northbridge
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Aaron Durbin 5c66f08a3a haswell: don't add a 0-sized memory range resource 
It's possible that TOUUD can be 4GiB in a small physical memory
configuration. Therefore, don't add a 0-size memory range resouce
in that case.

Change-Id: I016616a9d9d615417038e9c847c354db7d872819
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2691
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-16 04:58:18 +01:00
..
amd AMD Fam14: Add SPD read functions to wrapper code 2013-03-07 18:29:23 +01:00
intel haswell: don't add a 0-sized memory range resource 2013-03-16 04:58:18 +01:00
rdc GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
Kconfig Add the support for RDC R8610 Northbridge 2012-03-27 18:37:57 +02:00
Makefile.inc Add the support for RDC R8610 Northbridge 2012-03-27 18:37:57 +02:00