coreboot/src/southbridge
Furquan Shaikh d9558852c4 coreboot: Rename coreboot_ram stage to ramstage
Patch to rename coreboot_ram stage to ramstage. This is done in order to provide
consistency with other stage names(bootblock, romstage) and to allow any
Makefile rule generalization. (Required for patches to be submitted later)

CQ-DEPEND=CL:195101
BUG=None
BRANCH=None
TEST=Compiled successfully for all boards under mainboard/google/. Image booted
successfully on link board

Change-Id: I3e2495fc6a5cc91695ae04ffb438dd4ac265be64
Reviewed-on: https://chromium-review.googlesource.com/195059
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
2014-05-07 23:30:23 +00:00
..
amd rtc: Add an RTC API, and implement it for x86. 2014-05-02 23:55:47 +00:00
broadcom coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
intel cmos: Rename the CMOS related functions. 2014-05-02 23:55:44 +00:00
nvidia cmos: Rename the CMOS related functions. 2014-05-02 23:55:44 +00:00
rdc x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
ricoh GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
sis cmos: Rename the CMOS related functions. 2014-05-02 23:55:44 +00:00
ti GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via cmos: Rename the CMOS related functions. 2014-05-02 23:55:44 +00:00
Kconfig Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00
Makefile.inc Add support for RDC R8610 Southbridge 2012-03-27 18:39:05 +02:00