This patch perform resource mapping for PCI,
fixed MMIO, DRAM and IMR's based on inputs given by SoC.
TEST=Ensure PCI root bridge 0:0:0 memory resource allocation
remains same between previous implementation and current
implementation.
Change-Id: I3638c07cbbc15025f7bc2b1f573ebc5f7f816fb6
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 208587e0f6
Original-Change-Id: I15a3b2fc46ec9063b54379d41996b9a1d612cfd2
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-on: https://review.coreboot.org/19795
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/531697
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
31e425f85f