UPSTREAM: pciexp_device: Remove useless write on a read-only register
The Role-Based Error Reporting is not a configurable field, it's a read only field in the Device Capability register. This code was old and comes from commitf6eb88adbut evidently is not useful in any way. The PCIe Specification [1] states that it's read-only and must always be set to 1. I have also done tests on purism/librem13 hardware, trying to change that value, without any success. [1]: PCI Express Base Specification Revision 3.0 Page 612 BUG=none BRANCH=none TEST=none Change-Id: Id4dff17957fbd6e1f54ab0917d4f9c7b557149d8 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id:2f48b7b1e9Original-Change-Id: I729617a5c6f4f52dfc4c422df78379b309066399 Original-Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Original-Reviewed-on: https://review.coreboot.org/19901 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com> Original-Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-on: https://chromium-review.googlesource.com/531684 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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@ -361,11 +361,6 @@ static void pciexp_enable_aspm(device_t root, unsigned root_cap,
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lnkctl = pci_read_config16(endp, endp_cap + PCI_EXP_LNKCTL);
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lnkctl |= apmc;
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pci_write_config16(endp, endp_cap + PCI_EXP_LNKCTL, lnkctl);
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/* Enable ASPM role based error reporting. */
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devcap = pci_read_config32(endp, endp_cap + PCI_EXP_DEVCAP);
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devcap |= PCI_EXP_DEVCAP_RBER;
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pci_write_config32(endp, endp_cap + PCI_EXP_DEVCAP, devcap);
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}
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printk(BIOS_INFO, "ASPM: Enabled %s\n", aspm_type_str[apmc]);
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