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Teo Boon Tiong b21a7cf217 UPSTREAM: driver/intel/fsp1_1: Fix boot failure for non-verstage case 
Currently car_stage_entry is defined only in romstage_after_verstage and
as a result when SEPARATE_VERSTAGE is not selected, there is no
entry point into romstage and romstage will not be started at all.

The solution is move out romstage_after_verstage.S from fsp1.1 driver
to skylake/romstage. And add CONFIG_PLATFORM_USES_FSP1_1 to fix the
build and boot issue with this change.

Besides that, rename the romstage_after_verstage to romstage_c_entry
in more appropriate naming convention after this fix.

Tested on SkyLake Saddle Brook (FSP 1.1) and KabyLake Rvp11 (FSP 2.0),
romstage can be started successfully.

BUG=none
BRANCH=none
TEST=none

Change-Id: I95a45a090b4a335fa8655c89fbede13d011bb321
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d8e34b2c44
Original-Change-Id: I1cd2cf5655fdff6e23b7b76c3974e7dfd3835efd
Original-Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com>
Original-Reviewed-on: https://review.coreboot.org/17976
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/430735
2017-01-19 15:14:48 -08:00
..
fsp1_0 UPSTREAM: spi: Clean up SPI flash driver interface 2016-11-29 17:38:45 -08:00
fsp1_1 UPSTREAM: driver/intel/fsp1_1: Fix boot failure for non-verstage case 2017-01-19 15:14:48 -08:00
fsp2_0 UPSTREAM: drivers/intel/fsp2_0: add FSP TempRamInit & TempRamExit API support 2016-12-21 03:13:25 -08:00
gma UPSTREAM: drivers/intel/gma: Use scaling to simplify fb config 2016-12-21 03:12:59 -08:00
i210 UPSTREAM: intel/i210: Change API for function mainboard_get_mac_address() 2016-07-07 01:09:39 -07:00
wifi UPSTREAM: intel/wifi: Create ACPI objects for wifi SAR configuration 2017-01-13 18:41:36 -08:00