coreboot/src/vendorcode/amd
Julian Schroeder d2e278df33 soc/amd/common/fsp: check fsp image revision
Check if FSP binary and coreboot FSP structures (fspmupd.h) match
sufficiently.

A change in minor number denotes less critical changes or additions
to the FSP API that still allow for the boot process to proceed.
A change of the AMD image revision major number will halt boot.
The Fspmupd.h header now defines IMAGE_REVISION_ macros for AMD
Picasso, Cezanne and Sabrina APUs.

BUG=b:184650244
TEST=build, boot and check fsp image revision info. Example:

FSP major    = 1
FSP minor    = 0
FSP revision = 5
FSP build    = 0

Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: I0fbf9413b0cf3e6093ee9c61ff692ff78ebefebc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61281
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-02-11 20:40:49 +00:00
..
agesa vc/amd/agesa: fix out-of-bounds read 2022-01-26 22:17:06 +00:00
cimx Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
fsp soc/amd/common/fsp: check fsp image revision 2022-02-11 20:40:49 +00:00
include treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pi vc/amd/pi/00630F01: Remove unused directory and code 2021-05-26 22:42:35 +00:00
Kconfig vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profiles 2020-12-02 17:05:39 +00:00
Makefile.inc AMD Steppe Eagle: Add binary PI vendorcode files 2014-08-30 19:13:45 +02:00