coreboot/src/vendorcode
Jakub Czapiga ad6157ebdf timestamps: Rename timestamps to make names more consistent
This patch aims to make timestamps more consistent in naming,
to follow one pattern. Until now there were many naming patterns:
- TS_START_*/TS_END_*
- TS_BEFORE_*/TS_AFTER_*
- TS_*_START/TS_*_END
This change also aims to indicate, that these timestamps can be used
to create time-ranges, e.g. from TS_BOOTBLOCK_START to TS_BOOTBLOCK_END.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I533e32392224d9b67c37e6a67987b09bf1cf51c6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62019
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-03-08 16:06:33 +00:00
..
amd soc/amd/common/fsp: check fsp image revision 2022-02-11 20:40:49 +00:00
cavium src: use ARRAY_SIZE where possible 2021-02-15 11:30:40 +00:00
eltan vc/eltan/security/verified_boot/Makefile: add fmap_config.h dependency 2022-02-22 15:56:03 +00:00
google timestamps: Rename timestamps to make names more consistent 2022-03-08 16:06:33 +00:00
intel vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v3091_00 2022-03-07 20:13:48 +00:00
mediatek vc/mediatek/mt8195: Fix rank1 CKE setting for single-rank DRAM 2021-12-01 09:48:17 +00:00
siemens cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
Makefile.inc soc/mediatek/mt8192: initialize DRAM using vendor reference code 2021-03-08 03:15:43 +00:00