Jincheng Li 3828153ea5 soc/intel/xeon_sp/gnr: Use official microcodes ... Use microcode updates from intel-microcode submodule by default. Downstream users can still decide to use their own files. TEST=Build and boot on intel/avenuecity CRB TEST=Build and boot on intel/beechnutcity CRB Change-Id: I5a37423426b19dc9ec76984df5ad9c6d2a28f83b Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88283 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com>		2025-07-22 16:30:02 +00:00
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config.intel.cpx.crb
config.intel.crb.ac	soc/intel/xeon-sp/spr: Hook up public FSP bin and headers	2025-03-10 08:08:48 +00:00
config.intel.crb.avc	soc/intel/xeon_sp/gnr: Use official microcodes	2025-07-22 16:30:02 +00:00
config.intel.crb.bnc	soc/intel/xeon_sp/gnr: Use official microcodes	2025-07-22 16:30:02 +00:00
config.lenovo_t420
config.lenovo_t420s
config.lenovo_t430s
config.lenovo_t520
config.lenovo_t530
config.lenovo_x220
config.lenovo_x220i
config.lenovo_x230
config.mitaccomputing.r520g6sb	mainboard: Add 2S Intel Birch Stream MiTAC Computing R520G6SB	2025-06-11 13:30:57 +00:00
config.mitaccomputing.sc513g6	mainboard: Add 1S Intel Birch Stream MiTAC Computing SC513G6	2025-06-11 13:26:23 +00:00
config.ocp.deltalake
config.ocp.tiogapass
config.transformers	mb/inventec: Add Intel SPR server board Inventec Transformers	2023-07-20 10:11:07 +00:00