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Tim Wawrzynczak 60c619f6a3 soc/intel/jasperlake: Move tco_configure to bootblock 
Similar to CB:43313 (SHA bb50c67227), it seems possible for the same
problem to come up on jasperlake. Again, it should be harmless to
configure the TCO device earlier in the boot flow.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: If95e46124660b4ed457434f727c9f9f7b02b0327
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43539
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-22 21:06:34 +00:00
..
apollolake src: Use ACPI macros 2020-07-21 18:26:47 +00:00
baytrail src: Use ACPI macros 2020-07-21 18:26:47 +00:00
braswell src: Report word-sized access for PM1a_EVT 2020-07-20 13:33:32 +00:00
broadwell src: Use ACPI macros 2020-07-21 18:26:47 +00:00
cannonlake soc/intel/cannonlake: Move tco_configure to bootblock 2020-07-22 21:06:29 +00:00
common src: Use ACPI macros 2020-07-21 18:26:47 +00:00
denverton_ns src: Report word-sized access for PM1a_EVT 2020-07-20 13:33:32 +00:00
icelake src: Use ACPI macros 2020-07-21 18:26:47 +00:00
jasperlake soc/intel/jasperlake: Move tco_configure to bootblock 2020-07-22 21:06:34 +00:00
quark src: Make HAVE_CF9_RESET set the FADT reset register 2020-07-20 13:23:13 +00:00
skylake src: Use ACPI macros 2020-07-21 18:26:47 +00:00
tigerlake soc/intel/tigerlake: Select PLATFORM_USES_FSP2_2 2020-07-21 22:57:49 +00:00
xeon_sp src: Use ACPI macros 2020-07-21 18:26:47 +00:00
Kconfig