Tim Wawrzynczak 60c619f6a3 soc/intel/jasperlake: Move tco_configure to bootblock ... Similar to CB:43313 (SHA bb50c67227), it seems possible for the same problem to come up on jasperlake. Again, it should be harmless to configure the TCO device earlier in the boot flow. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: If95e46124660b4ed457434f727c9f9f7b02b0327 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43539 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-07-22 21:06:34 +00:00
..
amd	src: Make HAVE_CF9_RESET set the FADT reset register	2020-07-20 13:23:13 +00:00
cavium	src: Remove unused 'include <types.h>'	2020-07-14 16:10:17 +00:00
intel	soc/intel/jasperlake: Move tco_configure to bootblock	2020-07-22 21:06:34 +00:00
mediatek	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
nvidia	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
qualcomm	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
rockchip	soc/rockchip/rk3399/display.c: Add missing include	2020-07-14 16:11:42 +00:00
samsung	soc/samsung/exynos5420: Drop dead code	2020-07-09 21:37:01 +00:00
sifive	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00