coreboot/src
Duncan Laurie 21000496bb broadwell: Add USB3 PHY tuning fields to PEI DATA
These are board specific adjustments that can be made for each
USB3 port.

BUG=chrome-os-partner:28234
BRANCH=samus,auron
TEST=build and boot on samus

Change-Id: Iab92ff7b0218d4abd9eba8a94d34ddd9a30ddb87
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/230231
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2014-11-18 19:42:12 +00:00
..
arch arm64: psci cmd support 2014-11-12 19:57:38 +00:00
console console: add configs to support Marvell bg4cd uart 2014-10-17 03:24:42 +00:00
cpu urara: Fix CBFS header definitions 2014-11-11 18:02:20 +00:00
device PCIe: Add L1 Sub-State support. 2014-10-10 04:36:50 +00:00
drivers rtc: Add an RTC driver for the TI TPS65913 PMIC. 2014-11-13 23:25:26 +00:00
ec chromeec: Add wakeup delay after SPI /CS assertion 2014-10-01 06:53:27 +00:00
include ramoops: Add support for passing ramoops buffer address and size through cb 2014-11-14 06:37:22 +00:00
lib ramoops: Add support for passing ramoops buffer address and size through cb 2014-11-14 06:37:22 +00:00
mainboard vboot: add physical recovery switch support 2014-11-18 03:31:30 +00:00
northbridge Makefile: Preprocess linker scripts and other general improvements 2014-10-02 07:02:10 +00:00
soc broadwell: Add USB3 PHY tuning fields to PEI DATA 2014-11-18 19:42:12 +00:00
southbridge timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
superio superio: ite8772f: Exit extemp busy state 2014-09-27 07:09:25 +00:00
vendorcode vboot: add physical recovery switch support 2014-11-18 03:31:30 +00:00
Kconfig cbtables: Add RAM config information 2014-11-11 21:45:59 +00:00