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coreboot/src/soc/intel/skylake
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Sumeet Pawnikar f47ba97d63 UPSTREAM: soc/intel/skylake: set TCC activation by BSP only 
TCC activation functionality has package scope. It was set
for all CPU in the system which is unnecessary.
In this patch TCC activation is being set by the BSP only.

BUG=chrome-os-partner:59397
BRANCH=None.
TEST=Built for skylake platform and verified the TCC activation
value before and after S3.

Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/17889
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Iacf64cbc40871bbec3bede65f196bf292e0149a6
Reviewed-on: https://chromium-review.googlesource.com/425252
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-01-05 11:00:06 -08:00
..
acpi UPSTREAM: soc/intel/skylake: Add _ACx methods for TSR0 sensor for fan control 2016-11-08 23:23:50 -08:00
bootblock UPSTREAM: PCI ops: MMCONF_SUPPORT_DEFAULT is required 2016-12-08 12:31:39 -08:00
include UPSTREAM: soc/intel/skylake: Use the new SPI driver interface 2017-01-05 11:00:02 -08:00
nhlt UPSTREAM: soc/intel/{common,skylake}: provide common NHLT SoC support 2016-06-30 23:10:43 -07:00
romstage UPSTREAM: soc/intel/skylake: Use the new SPI driver interface 2017-01-05 11:00:02 -08:00
acpi.c UPSTREAM: soc/intel/skylake: don't hardcode GPE0 standard reg 2016-10-29 15:16:40 -07:00
chip.c UPSTREAM: soc/intel/skylake: Add USB Port Over Current (OC) Pin programming 2016-11-30 02:54:01 -08:00
chip.h UPSTREAM: soc/intel/common/lpss_i2c: simplify API and use common config structure 2016-11-14 19:58:28 -08:00
chip_fsp20.c UPSTREAM: romstage_handoff: add helper to determine resume status 2016-12-02 14:22:57 -08:00
cpu.c UPSTREAM: soc/intel/skylake: set TCC activation by BSP only 2017-01-05 11:00:06 -08:00
cpu_info.c
dsp.c UPSTREAM: skylake: Add Audio DSP device 2016-06-01 20:36:51 -07:00
early_smbus.c UPSTREAM: soc/intel/skylake: Define early smbus functions 2016-11-29 17:39:04 -08:00
elog.c UPSTREAM: soc/intel/skylake: Cleanup patch for Skylake SoC 2016-08-12 22:44:42 -07:00
finalize.c UPSTREAM: skylake: Do FspTempRamInit only for FSP1.1 & tidy up PCH early init 2016-08-19 14:19:54 -07:00
flash_controller.c UPSTREAM: soc/intel/skylake: Use the new SPI driver interface 2017-01-05 11:00:02 -08:00
gpio.c UPSTREAM: soc/intel/skylake: Remove pad configuration size hardcoding 2016-12-01 03:34:10 -08:00
i2c.c UPSTREAM: soc/intel/common/lpss_i2c: configure buses by rise/fall times 2016-11-14 19:58:56 -08:00
igd.c UPSTREAM: soc/intel/skylake: Add FSP 2.0 support in ramstage 2016-09-22 08:54:23 -07:00
irq.c UPSTREAM: soc/intel/skylake: Add FSP 2.0 support in ramstage 2016-09-22 08:54:23 -07:00
Kconfig UPSTREAM: MMCONF_SUPPORT: Flip default to enabled 2016-12-08 12:31:41 -08:00
lpc.c UPSTREAM: soc/intel/skylake: Add device id for PCH-Y 2016-11-08 20:29:36 -08:00
Makefile.inc UPSTREAM: soc/intel/skylake: Use the new SPI driver interface 2017-01-05 11:00:02 -08:00
me.c UPSTREAM: soc/intel/skylake: Implement Global Reset MEI message 2016-10-18 22:15:03 -07:00
memmap.c UPSTREAM: soc/intel/skylake: Fix top_of_ram calculation 2016-12-01 03:34:17 -08:00
monotonic_timer.c
opregion.c UPSTREAM: skylake: Add initial FSP2.0 support 2016-09-04 19:36:45 -07:00
pch.c UPSTREAM: soc/intel/skylake: Cleanup patch for Skylake SoC 2016-08-12 22:44:42 -07:00
pcie.c UPSTREAM: intel PCI ops: Remove explicit PCI MMCONF access 2016-12-08 12:31:05 -08:00
pcr.c intel/skylake: Init variable so GCC knows it's set 2016-01-15 22:41:11 +01:00
pei_data.c
pmc.c UPSTREAM: skylake: Prepare GPE for use in bootblock 2016-10-29 15:16:14 -07:00
pmutil.c UPSTREAM: soc/intel/{sky,apollo}lake: Wait until GPE is clear when reading 2016-11-08 23:23:45 -08:00
reset.c UPSTREAM: soc/intel/skylake: Handle platform global reset 2016-10-18 22:15:06 -07:00
sata.c UPSTREAM: soc/intel/skylake: Fix SATA booting to OS issue 2016-11-08 20:29:43 -08:00
sd.c UPSTREAM: acpi: Change device properties to work as a tree 2016-07-09 01:39:55 -07:00
smbus.c
smbus_common.c
smi.c UPSTREAM: skylake: Add support for eSPI SMI events 2016-10-29 15:16:16 -07:00
smihandler.c UPSTREAM: soc/intel/skylake: Use the new SPI driver interface 2017-01-05 11:00:02 -08:00
smmrelocate.c UPSTREAM: src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-08-04 23:37:59 -07:00
spi.c UPSTREAM: soc/intel/skylake: Use the new SPI driver interface 2017-01-05 11:00:02 -08:00
systemagent.c UPSTREAM: soc/intel/skylake: Add Kabylake device Ids 2016-08-12 13:45:15 -07:00
tsc_freq.c
uart.c
uart_debug.c drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
vr_config.c UPSTREAM: skylake: Add initial FSP2.0 support 2016-09-04 19:36:45 -07:00
xhci.c