coreboot/src/northbridge
Arthur Heymans f9c53acfeb UPSTREAM: nb/intel/x4x/raminit: Initialise async variable
It could end up not initialized which causes it not to build with
clang.

BUG=none
BRANCH=none
TEST=none

Change-Id: I295a03b36c881c157fd8ae00cace1686d67089ee
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 37689fae38
Original-Change-Id: I3be9477d836123aaa87c9bebb41c1ec34689a771
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/19736
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/514191
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
2017-05-24 18:23:52 -07:00
..
amd UPSTREAM: drivers/spi/spi_flash: Pass in flash structure to fill in probe 2017-05-22 19:31:18 -07:00
intel UPSTREAM: nb/intel/x4x/raminit: Initialise async variable 2017-05-24 18:23:52 -07:00
via UPSTREAM: northbridge/via/cn700/acpi: Add the host bridge 2017-04-18 13:18:59 -07:00