joel.bueno 632ae13fe0 soc/riscv/ucb: Switch to FDT parsing to get memory size ... Currently, coreboot tries to manually probe the memory for the Spike target as part of the SOC_UCB_RISCV target. However, Spike already passes a pointer to the device tree, so use it instead to get the memory size (like qemu-riscv does). TEST=Compile for SPIKE-RISCV and run (cmdline: spike -m1024 build/coreboot.elf) Change-Id: I5c826ab5e4896e07a78632d5d594377a3d6a7a43 Signed-off-by: joel.bueno <joel.bueno@openchip.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86588 Reviewed-by: Carlos López <carlos.lopezr4096@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>		2025-02-26 17:11:09 +00:00
..
cbmem.c	soc/riscv/ucb: Switch to FDT parsing to get memory size	2025-02-26 17:11:09 +00:00
chip.c
Kconfig	soc/riscv/ucb: Switch to FDT parsing to get memory size	2025-02-26 17:11:09 +00:00
Makefile.mk