coreboot/src/soc
Ronak Kanabar fc69b9d5ef soc/intel/alderlake: Add the CnviDdrRfim configuration
FSP v2422_01 introduced new FSPM UPD CnviDdrRfim. Add CnviDdrRfim
config to control the CnviDdrRfim UPD from devicetree. Setting
CnviDdrRfim to 1 enable CNVi DDR RFIM

BUG=b:201724512
BRANCH=None
TEST=Build and boot brya with debug FSP and verify CnviDdrRfim UPD value.

Change-Id: Ia06c9ed77d78821fd4724046bae2f31c9d771518
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58132
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-12-03 15:48:27 +00:00
..
amd soc/amd/cezanne: Enable secure counters 2021-12-03 15:28:47 +00:00
cavium Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
example Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
intel soc/intel/alderlake: Add the CnviDdrRfim configuration 2021-12-03 15:48:27 +00:00
mediatek soc/mediatek: move bustracker_init before watchdog resets again 2021-11-29 09:47:41 +00:00
nvidia soc/nvidia,qualcomm: Fix indirect includes 2021-11-09 00:13:25 +00:00
qualcomm sc7280: Add support for USB 2021-11-29 23:44:14 +00:00
rockchip mipi: Make panel init callback work directly on DSI transaction types 2021-09-11 01:42:47 +00:00
samsung src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
sifive src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
ti
ucb