It turns out that CB_TAG_ACPI_GNVS is handled in both x86 specific and common coreboot table parsing code. The MRC cache case used only by x86 is handled in the common code. This patch restores sanity and moves processing to where it belongs. BRANCH=none BUG=none TEST=verified that arm and x86 targets build. Change-Id: I2c114a8469455002c51593cb8be80585925969a7 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/225457 Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| .. | ||
| bayou | ||
| coreinfo | ||
| external | ||
| libpayload | ||
| nvramcui | ||
| tianocoreboot | ||
| ubootcli | ||