coreboot/mainboard/amd/norwich
Ronald G. Minnich 2f5d7b66a9 1. fix dtc to properly put @x,y in hex, not decimal.
2. Fix trivial bug in dtc -- ioport is 6 chars long, not 3
3. Fix all dts so that the @ parts are now in hex.
4. fix graphics mem in dbs62 to be 16 MB, per artec.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@700 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-07-30 15:08:25 +00:00
..
cmos.layout changes for the mainboards. 2007-06-27 20:38:27 +00:00
dts 1. fix dtc to properly put @x,y in hex, not decimal. 2008-07-30 15:08:25 +00:00
initram.c 1. geodelx.c: cover case of unterminated DRAM by adding a terminated 2008-07-29 15:54:46 +00:00
irq_tables.h PIRQ table cosmetics/cleanup. Bugfixes and #error for uninitialized 2008-03-07 01:20:36 +00:00
Kconfig Move default mainboard vendor/subsystem from Kconfig to dts. 2008-07-09 21:21:39 +00:00
Makefile Factor out write_pirq_routing_table() for all GeodeLX targets. 2008-03-01 21:33:51 +00:00
stage1.c Make cs5536_setup_onchipuart() handle both UARTs and add missing break in dbe61 initram. 2008-03-07 06:33:05 +00:00