coreboot/mainboard/amd/Kconfig
Carl-Daniel Hailfinger 15a05ab77a AMD DB800 support, ported from v2.
Tested on real hardware, some weirdness remains, probably related to
IRQ routing.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marc.jones@amd.com> 


git-svn-id: svn://coreboot.org/repository/coreboot-v3@643 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-03-14 21:15:03 +00:00

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##
## This file is part of the coreboot project.
##
## Copyright (C) 2007 coresystems GmbH
## (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
choice
prompt "Mainboard model"
depends on VENDOR_AMD
config BOARD_AMD_DB800
bool "DB800"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select SUPERIO_WINBOND_W83627HF
select PIRQ_TABLE
help
AMD DB800 Geode LX development board.
config BOARD_AMD_NORWICH
bool "Norwich"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select PIRQ_TABLE
help
AMD Norwich Geode LX development board.
endchoice
source "mainboard/amd/db800/Kconfig"
source "mainboard/amd/norwich/Kconfig"