Elyes HAOUAS 068253c369 mb/*/*/cmos.default: Harmonise CMOS files syntax ... These files are being updated to match the prevailing style of cmos.default files. Change-Id: I47d31d6fec8c9eb856aed0c63824d9556b7705e4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28051 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>		2018-08-16 16:44:42 +00:00
..
acpi
arch	arch/x86/acpigen: refactor calls to acpigen_write_register	2018-08-15 18:35:56 +00:00
commonlib	cbmem: rename vdat to chromeos_acpi	2018-08-14 14:48:44 +00:00
console	arch/x86: Drop leftover ROMCC console support	2018-06-08 03:31:12 +00:00
cpu	src: Get rid of non-local header treated as local	2018-08-13 15:38:38 +00:00
device	src/device: Fix typo	2018-08-09 15:57:35 +00:00
drivers	src: Remove duplicated 'include <device/device.h>'	2018-08-14 23:25:59 +00:00
ec	ec/google/chromeec: de-dup a _UID	2018-08-13 12:23:37 +00:00
include	lib/fit: support booting initrd placed above 4GiB	2018-08-10 23:23:17 +00:00
lib	lib/lzmadecode.c: : Avoid static analysis error for unused value	2018-08-14 23:24:58 +00:00
mainboard	mb/*/*/cmos.default: Harmonise CMOS files syntax	2018-08-16 16:44:42 +00:00
northbridge	nb/intel/haswell: Always locate mrc.bin in the COREBOOT fmap region	2018-08-13 12:29:23 +00:00
security	security/vboot/Makefile: Use shell cat instead of make file command	2018-08-13 12:17:25 +00:00
soc	amd/stoneyridge: Add PMxC0 reset status to boot log	2018-08-16 16:30:52 +00:00
southbridge	sb/intel/i82801[ij]x: do not set Chipset Initialization Register (CIR) 5	2018-08-16 16:31:00 +00:00
superio	superio/winbond/w83627hf: Remove unused value	2018-08-13 15:39:29 +00:00
vendorcode	Stoneyridge: Remove VENDORCODE_FULL_SUPPORT	2018-08-15 18:34:15 +00:00
Kconfig	Kconfig: Make the EM100 config option common	2018-07-16 07:41:14 +00:00