Some variants need the internal pull resistor on GPIO_SSUS_40
set explicitly to pull down rather than disabling the pull,
in order for the ram-id to be read correctly via GPIO.
Correct this by adding a function to enable and set the internal pull
and define its use as needed in the board's variant.h.
Chromium source:
branch: firmware-gnawty-5216.239.B
/src/soc/intel/baytrail/baytrail/gpio.h#418
/src/mainboard/google/gnawty/romstage.c#60
Test: boot 4GB Candy board and observe correct RAM id, amount detected
BUG=none
BRANCH=none
TEST=none
Change-Id: Ia648846f4cdf65908db9a310b201562f0ff72951
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Id:
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| .. | ||
| broadcom/cygnus | ||
| dmp/vortex86ex | ||
| imgtec/pistachio | ||
| intel | ||
| lowrisc/lowrisc | ||
| marvell | ||
| mediatek/mt8173 | ||
| nvidia | ||
| qualcomm | ||
| rdc/r8610 | ||
| rockchip | ||
| samsung | ||
| ucb/riscv | ||