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coreboot/src/soc
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Barnali Sarkar 78e9326193 UPSTREAM: soc/intel/common/block: Add Intel common FAST_SPI code 
Create Intel Common FAST_SPI Controller code.

This code contains the code for SPI initialization which has
the following programming -

* Get BIOS Rom Region Size
* Enable SPIBAR
* Disable the BIOS write protect so write commands are allowed
* Enable SPI Prefetching and Caching.
* SPI Controller register offsets in the common header fast_spi.h
* Implement FAST_SPI read, write, erase APIs.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ifd05fa75ddd34ae5df48e4dee0618f30b8d23654
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 89331cd4c8
Original-Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb
Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18557
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/493985
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
2017-05-02 20:24:09 -07:00
..
broadcom/cygnus UPSTREAM: vboot: Move remaining features out of vendorcode/google/chromeos 2017-03-29 13:43:08 -07:00
dmp/vortex86ex UPSTREAM: src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-08-04 23:37:59 -07:00
imgtec/pistachio UPSTREAM: spi: Get rid of SPI_ATOMIC_SEQUENCING 2017-01-05 11:00:04 -08:00
intel UPSTREAM: soc/intel/common/block: Add Intel common FAST_SPI code 2017-05-02 20:24:09 -07:00
lowrisc/lowrisc UPSTREAM: soc/lowrisc: Place CBMEM at top of autodetected RAM 2016-12-08 12:30:55 -08:00
marvell UPSTREAM: vboot: Move remaining features out of vendorcode/google/chromeos 2017-03-29 13:43:08 -07:00
mediatek/mt8173 UPSTREAM: mediatek/mt8173: Add support for Dual DSI output 2017-04-25 05:52:33 -07:00
nvidia UPSTREAM: vboot: Move remaining features out of vendorcode/google/chromeos 2017-03-29 13:43:08 -07:00
qualcomm UPSTREAM: Remove libverstage as separate library and source file class 2017-03-29 13:43:09 -07:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip UPSTREAM: Remove libverstage as separate library and source file class 2017-03-29 13:43:09 -07:00
samsung UPSTREAM: vboot: Select SoC-specific configuration for all Chrome OS boards 2017-03-29 13:43:05 -07:00
ucb/riscv UPSTREAM: soc/ucb/riscv: Place CBMEM at top of autodetected RAM 2016-12-08 12:30:48 -08:00