Commit graph

4 commits

Author SHA1 Message Date
Matt DeVillier
cba46a41b7 mainboard/{hardkernel,protectli}: Drop use of DRAM_SUPPORT_DDR5
This is now selected at the SoC level and therefore redundant.

Change-Id: Ib6ae94c359d3dac34886147e9078043e4f132f84
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88522
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-08-02 01:47:22 +00:00
Matt DeVillier
b20f6d27e2 device/dram: Rename 'USE_DDRx' config options
Rename config options 'USE_DDRx' to 'DRAM_SUPPORT_DDRx' to make them
less clunky, and in preparation to expand their use inside SoC code.

Change-Id: Ie6edd730c5cbad679a90fcf7989a942d9b2dd3d8
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88520
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: <yuchi.chen@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2025-07-25 17:03:02 +00:00
Nicholas Sudsgaard
88974d3094 mb/hardkernel/odroid-h4: Correct number of jacks in hda_verb.c
This was found due to the `_Static_assert()` from CB:84360 failing.

Change-Id: I401e94b107612f8b7e8a73b3dbc12d7a5227ef01
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85076
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2024-11-10 22:19:35 +00:00
David Milosevic
b29b66c5f5 mb/hardkernel/odroid-h4: Add support for ODROID-H4 series
Add support for the ODROID-H4 family of boards. Tested on an ODROID-H4+
board, but all of them use the same PCB (with different components).

The four SATA ports on the mainboard are provided by an onboard ASMedia
ASM1064B PCIe-to-SATA bridge. Unlike other mainboards in the tree using
an ASMedia ASM1061 or ASM1062 PCIe-to-SATA bridge, the ODROID-H4+ comes
with a SPI flash chip for the ASM1064B and does not seem to have issues
regarding PCIe power management (e.g. ASPM) or unusable SATA AHCI mode.

The ODROID-H4 comes with a single 16 MiB SPI flash chip. The ODROID-H4+
and the ODROID-H4 Ultra feature Dual BIOS, consisting of another 16 MiB
SPI flash chip and a 3-pin header to select between them. The board can
be flashed internally or using a SOIC-8 clip, but the M.2 slot may need
to be empty for the clip to fit.

Working:

 - DDR5 SO-DIMM slot
 - All SATA ports on ASMedia ASM1064B PCIe-to-SATA controller
 - UART to emit spam
 - All video outputs (FSP GOP only lights up one output at a time)
 - All USB ports (on the Ethernet connectors and on EXT_HDR1)
 - M.2 M connector (PCIe only)
 - PCIe power management
 - Ethernet NICs
 - eMMC
 - HD audio codec and display audio
 - S3 suspend/resume
 - SeaBIOS <current version>
 - MrChromebox edk2 <current version>
 - Super I/O HWM on Linux (using out-of-tree it87 kernel module)
 - Booting Arch Linux from NVMe and SATA
 - Booting Windows 10 from NVMe

Not working:

 - PECI: undocumented protocol and undocumented Super I/O
 - Resuming on Windows 10 BSODs with `VIDEO_TDR_FAILURE`

Untested:

 - Fan curves: may need to lower the temperature limits a bit

Change-Id: I7e0d395ba3d15dfcf6d47a222b90499ca371e4eb
Signed-off-by: David Milosevic <David.Milosevic@9elements.com>
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83979
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2024-09-27 11:35:23 +00:00