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nyan: Set up the ChromeOS related GPIOs and SPI bus 1 which goes to the EC.

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BUG=None
TEST=With this and other changes, built and booted into depthcharge on nyan
with the GPIO table configured.
BRANCH=None

Change-Id: I83c6209efbdcf09a095b5366b6759b2ad9a60a2c
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/173788
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Gabe Black 2013-10-19 01:24:25 -07:00 • committed by chrome-internal-fetch
commit ff172bfe30
1 changed files with 35 additions and 1 deletions
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36
src/mainboard/google/nyan/mainboard.c
View file

@ -19,10 +19,44 @@
#include <device/device.h>
#include <boot/coreboot_tables.h>
#include <soc/nvidia/tegra124/gpio.h>
static void setup_pinmux(void)
{
// Write protect.
gpio_input_pullup(GPIO(R1));
// Recovery mode.
gpio_input_pullup(GPIO(Q7));
// Lid switch.
gpio_input_pullup(GPIO(R4));
// Power switch.
gpio_input_pullup(GPIO(Q0));
// Developer mode.
gpio_input_pullup(GPIO(Q6));
// EC in RW.
gpio_input_pullup(GPIO(U4));
// SPI1 MOSI
pinmux_set_config(PINMUX_ULPI_CLK_INDEX, PINMUX_ULPI_CLK_FUNC_SPI1 |
PINMUX_PULL_UP |
PINMUX_INPUT_ENABLE);
// SPI1 MISO
pinmux_set_config(PINMUX_ULPI_DIR_INDEX, PINMUX_ULPI_DIR_FUNC_SPI1 |
PINMUX_PULL_UP |
PINMUX_INPUT_ENABLE);
// SPI1 SCLK
pinmux_set_config(PINMUX_ULPI_NXT_INDEX, PINMUX_ULPI_NXT_FUNC_SPI1 |
PINMUX_PULL_NONE |
PINMUX_INPUT_ENABLE);
// SPI1 CS0
pinmux_set_config(PINMUX_ULPI_STP_INDEX, PINMUX_ULPI_STP_FUNC_SPI1 |
PINMUX_PULL_NONE |
PINMUX_INPUT_ENABLE);
}
/* this happens after cpu_init where exynos resources are set */
static void mainboard_init(device_t dev)
{
setup_pinmux();
}
static void mainboard_enable(device_t dev)