From ff172bfe30f75983a1e8efa2ead0a4519583d0a8 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 19 Oct 2013 01:24:25 -0700 Subject: [PATCH] nyan: Set up the ChromeOS related GPIOs and SPI bus 1 which goes to the EC. BUG=None TEST=With this and other changes, built and booted into depthcharge on nyan with the GPIO table configured. BRANCH=None Change-Id: I83c6209efbdcf09a095b5366b6759b2ad9a60a2c Signed-off-by: Gabe Black Reviewed-on: https://chromium-review.googlesource.com/173788 Reviewed-by: Gabe Black Tested-by: Gabe Black Commit-Queue: Gabe Black --- src/mainboard/google/nyan/mainboard.c | 36 ++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c index 9e080214b0..c7258ff12d 100644 --- a/src/mainboard/google/nyan/mainboard.c +++ b/src/mainboard/google/nyan/mainboard.c @@ -19,10 +19,44 @@ #include #include +#include + +static void setup_pinmux(void) +{ + // Write protect. + gpio_input_pullup(GPIO(R1)); + // Recovery mode. + gpio_input_pullup(GPIO(Q7)); + // Lid switch. + gpio_input_pullup(GPIO(R4)); + // Power switch. + gpio_input_pullup(GPIO(Q0)); + // Developer mode. + gpio_input_pullup(GPIO(Q6)); + // EC in RW. + gpio_input_pullup(GPIO(U4)); + + // SPI1 MOSI + pinmux_set_config(PINMUX_ULPI_CLK_INDEX, PINMUX_ULPI_CLK_FUNC_SPI1 | + PINMUX_PULL_UP | + PINMUX_INPUT_ENABLE); + // SPI1 MISO + pinmux_set_config(PINMUX_ULPI_DIR_INDEX, PINMUX_ULPI_DIR_FUNC_SPI1 | + PINMUX_PULL_UP | + PINMUX_INPUT_ENABLE); + // SPI1 SCLK + pinmux_set_config(PINMUX_ULPI_NXT_INDEX, PINMUX_ULPI_NXT_FUNC_SPI1 | + PINMUX_PULL_NONE | + PINMUX_INPUT_ENABLE); + // SPI1 CS0 + pinmux_set_config(PINMUX_ULPI_STP_INDEX, PINMUX_ULPI_STP_FUNC_SPI1 | + PINMUX_PULL_NONE | + PINMUX_INPUT_ENABLE); +} -/* this happens after cpu_init where exynos resources are set */ static void mainboard_init(device_t dev) { + setup_pinmux(); } static void mainboard_enable(device_t dev)