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mb/google/nissa/var/pujjocento: Adjust touch panel timing for stability

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Reduce reset delay from 20ms to 0ms to shorten total tp_rst time from
350ms to 330ms. Validation on Prade shows the controller initializes
reliably within the reduced timing. It will be able to complete the
following steps before vccs on.

1. TP Reset
2. Get HID Description
3. HID Reset/HID Power On
4. Get Report Descriptor/Get Feature Report

Verification results are in b/455053468 comment#3

BUG=b:455053468
BRANCH=none
TEST=Build and boot to pujjocento. Verify touchpanel sequence

Change-Id: I4efa4e927e78d3200b357f5f5b41c3d2aef12f8b
Signed-off-by: Zheng Li <lizheng@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89748
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Zheng Li 2025-10-25 18:28:54 +08:00 • committed by Subrata Banik
commit fea1b2abbe
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/brya/variants/pujjocento/overridetree.cb
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@ -547,7 +547,7 @@ chip soc/intel/alderlake
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E11_IRQ)"
register "generic.detect" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
register "generic.reset_delay_ms" = "20"
register "generic.reset_delay_ms" = "0"
register "generic.reset_off_delay_ms" = "2"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C4)"
register "generic.stop_off_delay_ms" = "2"