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mainboard/google/ocelot: Update PCIe root port for SD card interface

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This commit updates the PCIe root port configuration for the SD card
interface in the overridetree.cb file for the Ocelot variant.
The reference is changed from `pcie_rp5` to `pcie_rp6`.

BUG=b:440042829
TEST=Boot the device with the updated firmware and verify that the
SD card is enumerated under pcie_rp6

Change-Id: I2b3c0b6e19409fef933aa7dc06f5df035f620738
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88873
Reviewed-by: Usha P <usha.p@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Krishna P Bhat D <krishna.p.bhat.d@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Appukuttan V K 2025-08-20 22:31:16 +05:30 • committed by Nick Vaccaro
commit fbb68982c9
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/ocelot/variants/ocelot/overridetree.cb
View file

@ -478,10 +478,10 @@ chip soc/intel/pantherlake
end
end # Gen4 M.2 SSD
device ref pcie_rp5 on
device ref pcie_rp6 on
probe SD SD_GENSYS
probe SD SD_BAYHUB
register "pcie_rp[PCIE_RP(5)]" = "{
register "pcie_rp[PCIE_RP(6)]" = "{
.clk_src = 2,
.clk_req = 2,
.flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER,