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google/veyron_{rialto, danger}: Work around RAM code strapping error

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Similar to 6b284e8aa0.
"google/veyron: Work around RAM code strapping error"
Applied to Danger and Rialto as well.

TLDR: We can't rely on hiz ram strappings, make sure we only do binary.

Partial revert of bd5aa1a548.
"veyron_*: Add new Micron and Hynix modules"

TEST=On rialto, in the firmware log there should be no mention of "Reading
tristate GPIOs" near the "romstage "..." starting..."
RAM Config should read something sane (not 16), probably 1.
BUG=b/70533667, b/36279493
BRANCH=veyron

Change-Id: Ia49cf9280734900060085ceebd6562d48e4d46c0
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/957815
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Alexandru M Stan 2018-03-09 15:47:17 -08:00 • committed by ChromeOS Commit Bot
commit f7bc4c8039
3 changed files with 7 additions and 19 deletions
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12
src/mainboard/google/veyron_danger/sdram_configs.c
View file

@ -41,16 +41,10 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */
#include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */
#include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */
#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 000Z */
#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */
#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */
/* Brain, Jaq, Jerry, Mighty, Danger and Rialto
* cannot support tri-state, see b/36279493! */
};
_Static_assert(ARRAY_SIZE(sdram_configs) == 24, "Must have 24 sdram_configs!");
_Static_assert(ARRAY_SIZE(sdram_configs) == 16, "Must have 16 sdram_configs!");
const struct rk3288_sdram_params *get_sdram_config()
{

2
src/mainboard/google/veyron_rialto/boardid.c
View file

@ -42,7 +42,7 @@ uint32_t ram_code(void)
static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
[1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins));
code = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "RAM Config: %u.\n", code);
return code;

12
src/mainboard/google/veyron_rialto/sdram_configs.c
View file

@ -41,16 +41,10 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 001Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z0 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */
/* Brain, Jaq, Jerry, Mighty, Danger and Rialto
* cannot support tri-state, see b/36279493! */
};
_Static_assert(ARRAY_SIZE(sdram_configs) == 24, "Must have 24 sdram_configs!");
_Static_assert(ARRAY_SIZE(sdram_configs) == 16, "Must have 16 sdram_configs!");
const struct rk3288_sdram_params *get_sdram_config()
{