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google/veyron: Work around RAM code strapping error

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With a recent patch (google/veyron_*: Add new Micron and Hynix modules)
we switched RAM codes for Veyron boards to tri-state since we were
running out of binary numbers. Unfortunately we only tested that change
on Minnie and Speedy, and it turns out that it broke Jaq, Jerry and
Mighty. The "high" RAM code pins on those boards were incorrectly
strapped with 100Kohm resistors (as opposed to 1Kohm on Minnie and
Speedy), which is too high to overpower the SoC-internal pull-down we
use to differentiate "high" from "tri-state". Since we already used
tri-state codes on some Minnie and Speedy SKUs we have to hack up the
code to work differently on these two groups of boards to keep
everything working.

BRANCH=veyron
BUG=b:36279493
TEST=None (will go through QA if we ever end up needing it in another
firmware release)

Change-Id: I0cefd8ab4e8f11596e2033b40bc600aecdc30bc0
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/456741
Reviewed-by: Philip Chen <philipchen@chromium.org>
This commit is contained in:
Julius Werner 2017-03-16 14:34:37 -07:00 • committed by ChromeOS Commit Bot
commit 6b284e8aa0
8 changed files with 12 additions and 40 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/mainboard/google/veyron_brain/boardid.c
View file

@ -42,7 +42,7 @@ uint32_t ram_code(void)
static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
[1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins));
code = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "RAM Config: %u.\n", code);
return code;

11
src/mainboard/google/veyron_brain/sdram_configs.c
View file

@ -41,16 +41,9 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */
#include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */
#include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */
#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 000Z */
#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */
#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */
/* Brain, Jaq, Jerry and Mighty cannot support tri-state, see b/36279493! */
};
_Static_assert(ARRAY_SIZE(sdram_configs) == 24, "Must have 24 sdram_configs!");
_Static_assert(ARRAY_SIZE(sdram_configs) == 16, "Must have 16 sdram_configs!");
const struct rk3288_sdram_params *get_sdram_config()
{

2
src/mainboard/google/veyron_jaq/boardid.c
View file

@ -42,7 +42,7 @@ uint32_t ram_code(void)
static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
[1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins));
code = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "RAM Config: %u.\n", code);
return code;

11
src/mainboard/google/veyron_jaq/sdram_configs.c
View file

@ -41,16 +41,9 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */
#include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */
#include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */
#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 000Z */
#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */
#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */
/* Brain, Jaq, Jerry and Mighty cannot support tri-state, see b/36279493! */
};
_Static_assert(ARRAY_SIZE(sdram_configs) == 24, "Must have 24 sdram_configs!");
_Static_assert(ARRAY_SIZE(sdram_configs) == 16, "Must have 16 sdram_configs!");
const struct rk3288_sdram_params *get_sdram_config()
{

2
src/mainboard/google/veyron_jerry/boardid.c
View file

@ -42,7 +42,7 @@ uint32_t ram_code(void)
static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
[1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins));
code = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "RAM Config: %u.\n", code);
return code;

11
src/mainboard/google/veyron_jerry/sdram_configs.c
View file

@ -41,16 +41,9 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */
#include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */
#include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */
#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 000Z */
#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */
#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */
/* Brain, Jaq, Jerry and Mighty cannot support tri-state, see b/36279493! */
};
_Static_assert(ARRAY_SIZE(sdram_configs) == 24, "Must have 24 sdram_configs!");
_Static_assert(ARRAY_SIZE(sdram_configs) == 16, "Must have 16 sdram_configs!");
const struct rk3288_sdram_params *get_sdram_config()
{

2
src/mainboard/google/veyron_mighty/boardid.c
View file

@ -42,7 +42,7 @@ uint32_t ram_code(void)
static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
[1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins));
code = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "RAM Config: %u.\n", code);
return code;

11
src/mainboard/google/veyron_mighty/sdram_configs.c
View file

@ -41,16 +41,9 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */
#include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */
#include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */
#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 000Z */
#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */
#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */
#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */
/* Brain, Jaq, Jerry and Mighty cannot support tri-state, see b/36279493! */
};
_Static_assert(ARRAY_SIZE(sdram_configs) == 24, "Must have 24 sdram_configs!");
_Static_assert(ARRAY_SIZE(sdram_configs) == 16, "Must have 16 sdram_configs!");
const struct rk3288_sdram_params *get_sdram_config()
{