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sb/intel/common/gpio: Move register defines

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Move ICH7 GPIO register defines into private scope. This enforces
the use of GPIO common code and mainboard can no longer directly
access GPIO I/O registers.

Change-Id: Iedf3e55f8aecf7b1ac6f47b29d9f88d58d1b6867
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88568
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Patrick Rudolph 2025-07-26 09:35:08 +02:00 • committed by Matt DeVillier
commit f789899dac
2 changed files with 22 additions and 16 deletions
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22
src/southbridge/intel/common/gpio.c
View file

@ -12,9 +12,31 @@
#define MAX_GPIO_NUMBER 75 /* zero based */
/*
* If you want to use these macros outside this file, consider making
* more helper functions to expose the functionality you want instead.
*/
/* LPC GPIO Base Address Register */
#define GPIO_BASE 0x48
/* ICH7 GPIOBASE */
#define GPIO_USE_SEL 0x00
#define GP_IO_SEL 0x04
#define GP_LVL 0x0c
#define GPO_BLINK 0x18
#define GPI_INV 0x2c
#define GPIO_USE_SEL2 0x30
#define GP_IO_SEL2 0x34
#define GP_LVL2 0x38
#define GPIO_USE_SEL3 0x40
#define GP_IO_SEL3 0x44
#define GP_LVL3 0x48
#define GP_RST_SEL1 0x60
#define GP_RST_SEL2 0x64
#define GP_RST_SEL3 0x68
static u16 get_gpio_base(void)
{
#ifdef __SIMPLE_DEVICE__

16
src/southbridge/intel/common/gpio.h
View file

@ -7,22 +7,6 @@
#include <stdbool.h>
#include <soc/gpio.h>
/* ICH7 GPIOBASE */
#define GPIO_USE_SEL 0x00
#define GP_IO_SEL 0x04
#define GP_LVL 0x0c
#define GPO_BLINK 0x18
#define GPI_INV 0x2c
#define GPIO_USE_SEL2 0x30
#define GP_IO_SEL2 0x34
#define GP_LVL2 0x38
#define GPIO_USE_SEL3 0x40
#define GP_IO_SEL3 0x44
#define GP_LVL3 0x48
#define GP_RST_SEL1 0x60
#define GP_RST_SEL2 0x64
#define GP_RST_SEL3 0x68
#define GPIO_MODE_NATIVE 0
#define GPIO_MODE_GPIO 1
#define GPIO_MODE_NONE 1