mb/google/brya: Add romstage early graphics for trulo baseboard

1) Add all required changes for eSOL support.
2) Select MAINBOARD_USE_EARLY_LIBGFXINIT for Trulo.

The CSOT (MNC207QS1-1) panel is used for the devicetree.

BUG=b:362895813
TEST=On-screen text message seen during MRC training on Trulo SKU1.

MRC: no data in 'RW_MRC_CACHE'
bootmode is set to: 0
DP PHY mode status not complete
DP PHY mode status not complete
DP PHY mode status not complete
...
Informing user on-display of memory training

Change-Id: Ic34a8601b3084aa5f780d358fb0b15b7e820d375
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84128
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Amanda Hwang <amanda_hwang@compal.corp-partner.google.com>

src/mainboard/google/brya/Kconfig

@@ -113,6 +113,7 @@ config BOARD_GOOGLE_BASEBOARD_TRULO
 	select DRIVERS_AUDIO_SOF
 	select DRIVERS_INTEL_ISH
 	select MAINBOARD_DISABLE_STAGE_CACHE
+	select MAINBOARD_HAS_EARLY_LIBGFXINIT
 	select MEMORY_SOLDERDOWN
 	select SOC_INTEL_COMMON_MMC_OVERRIDE
 	select SOC_INTEL_CSE_LITE_COMPRESS_ME_RW

src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk

@@ -1,3 +1,4 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 
+romstage-$(CONFIG_MAINBOARD_USE_EARLY_LIBGFXINIT) += gma-mainboard.ads
 romstage-y += memory.c

src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb

@@ -45,7 +45,37 @@ chip soc/intel/alderlake
 	register "pch_hda_sdi_enable[1]" = "true"
 
 	device domain 0 on
-		device ref igpu on end
+		# The timing values can be derived from datasheet of display panel
+		# You can use EDID string to identify the type of display on the board
+		# use below command to get display info from EDID
+		# strings /sys/devices/pci0000:00/0000:00:02.0/drm/card0/card0-eDP-1/edid
+
+		# refer to display PRM document (Volume 2b: Command Reference: Registers)
+		# for more info on display control registers
+		# https://01.org/linuxgraphics/documentation/hardware-specification-prms
+		#+-----------------------------+---------------------------------------+-----+
+		#| Intel docs                  | devicetree.cb                         | eDP |
+		#+-----------------------------+---------------------------------------+-----+
+		#| Power up delay              | `gpu_panel_power_up_delay`            | T3  |
+		#+-----------------------------+---------------------------------------+-----+
+		#| Power on to backlight on    | `gpu_panel_power_backlight_on_delay`  | T7  |
+		#+-----------------------------+---------------------------------------+-----+
+		#| Power Down delay            | `gpu_panel_power_down_delay`          | T10 |
+		#+-----------------------------+---------------------------------------+-----+
+		#| Backlight off to power down | `gpu_panel_power_backlight_off_delay` | T9  |
+		#+-----------------------------+---------------------------------------+-----+
+		#| Power Cycle Delay           | `gpu_panel_power_cycle_delay`         | T12 |
+		#+-----------------------------+---------------------------------------+-----+
+		device ref igpu on
+			register "panel_cfg" = "{
+			    .up_delay_ms = 200,
+			    .down_delay_ms = 50,
+			    .cycle_delay_ms = 500,
+			    .backlight_on_delay_ms = 1,
+			    .backlight_off_delay_ms = 200,
+			    .backlight_pwm_hz = 200,
+			}"
+		end
 		device ref dtt on end
 		device ref tcss_xhci on end
 		device ref ish on

src/mainboard/google/brya/variants/baseboard/trulo/gma-mainboard.ads

@@ -0,0 +1,13 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+   ports : constant Port_List :=
+     (eDP,
+      others => Disabled);
+end GMA.Mainboard;