erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

rockchip/rk3399: Halt if we get an invalid odt or drv value

Browse source 
When we were pushing the updated sdram.c to coreboot.org, the compiler
there found that we were not initializing vref_value_dq in all code
possible code paths.

This patch updates those code paths to halt the system.

Branch=none
Bug=none
Test=Built with coreboot.org toolchain and verified that the compile
errors were gone.

Change-Id: I0ad4207dc976236d64b6cdda58d10bcfbe1fde11
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/362726
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Martin Roth 2016-07-25 11:29:59 -06:00 • committed by chrome-bot
commit f326097fda
1 changed files with 8 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

8
src/soc/rockchip/rk3399/sdram.c
View file

@ -346,6 +346,8 @@ static void phy_io_config(u32 channel,
case PHY_DRV_ODT_60:
vref_value_dq = 0x36;
break;
default:
die("Halting: Invalid ODT value.\n");
}
} else if (drv_value == PHY_DRV_ODT_40) {
switch (odt_value) {
@ -358,6 +360,8 @@ static void phy_io_config(u32 channel,
case PHY_DRV_ODT_60:
vref_value_dq = 0x31;
break;
default:
die("Halting: Invalid ODT value.\n");
}
} else if (drv_value == PHY_DRV_ODT_34_3) {
switch (odt_value) {
@ -370,7 +374,11 @@ static void phy_io_config(u32 channel,
case PHY_DRV_ODT_60:
vref_value_dq = 0x2e;
break;
default:
die("Halting: Invalid ODT value.\n");
}
} else {
die("Halting: Invalid DRV value.\n");
}
} else {
vref_mode_dq = 0x2; /* LPDDR3 */