soc/mediatek/mt8196: Set MT6316 deglitch time from 2ns to 4ns
To fix the SPMI-P glitch, set the mt6316 deglitch time from 2ns to 4ns. Additionally, a hardware solution of SPMI damping to 0 ohm is needed. BRANCH=rauru TEST=Build passed and booted successfully. 10 platforms have passed CPU stress tests over multiple iterations. BUG=b:386438329 Signed-off-by: Lu Tang <lu.tang@mediatek.corp-partner.google.com> Change-Id: I77bd50cc6c25d6dcded57d9d65d92a0dd19c3c86 Reviewed-on: https://review.coreboot.org/c/coreboot/+/86371 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Knox Chiou <knoxchiou@google.com> Reviewed-by: Yidi Lin <yidilin@google.com>
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2 changed files with 10 additions and 0 deletions
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@ -29,6 +29,7 @@ enum {
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MT6316_PMIC_TEST_CON9 = 0x222,
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MT6316_PMIC_PLT_DIG_WPK = 0x3B1,
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MT6316_PMIC_PLT_DIG_WPK_H = 0x3B2,
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MT6316_PMIC_SPMI_RSV1 = 0x43A,
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MT6316_BUCK_TOP_ELR0 = 0x1448,
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MT6316_BUCK_TOP_ELR1 = 0x1449,
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MT6316_BUCK_TOP_ELR2 = 0x144A,
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@ -169,6 +169,14 @@ static void mt6316_set_all_test_con9(void)
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mt6316_write8(mt6316_slave_id[i], MT6316_PMIC_TEST_CON9, 0x20);
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}
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static void mt6316_set_all_deglitch(void)
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{
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/* Set deglitch time from 2ns to 4ns */
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for (int i = 0; i < ARRAY_SIZE(mt6316_slave_id); i++)
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mt6316_write_field(mt6316_slave_id[i],
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MT6316_PMIC_SPMI_RSV1, 0x0A, 0xFF, 0);
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}
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static void init_pmif_arb(void)
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{
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if (pmif_arb)
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@ -196,4 +204,5 @@ void mt6316_init(void)
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mt6316_init_setting();
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mt6316_set_all_test_con9();
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mt6316_set_all_deglitch();
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}
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