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mb/google/brya/bujia: Enable RTD3 for SSD

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Add PCIe RTD3 support so NVMe gets placed into D3 state when entering
S0ix. Some SSDs block the CPU from reaching C10 during the S0ix
suspend without the RTD3 configuration.

BUG=b:391612392
TEST=Run suspend_stress_test on Bujia and verify that the device
suspends to S0ix.

Change-Id: Idee14e7d4df0a9cf8b06b33a52016c1b9228e459
Signed-off-by: Pranava Y N <pranavayn@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Pranava Y N 2025-02-28 16:11:46 +05:30 • committed by Matt DeVillier
commit f0f66be2c3
1 changed files with 7 additions and 0 deletions
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7
src/mainboard/google/brya/variants/bujia/overridetree.cb
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@ -119,6 +119,13 @@ chip soc/intel/alderlake
.clk_src = 0,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
chip soc/intel/common/block/pcie/rtd3
register "is_storage" = "true"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F14)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)"
register "srcclk_pin" = "0"
device generic 0 on end
end
end #NVME
device ref tbt_pcie_rp0 off end
device ref tbt_pcie_rp1 off end