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config/builder/mitac: Hook up public FSP repo and microcode

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For following Mitac Computing platforms:
  sc513g6 and r520g6sb

TEST=Build and boot on Mitac Computing/sc513g6 platform
TEST=Build and boot on Mitac Computing/r520g6sb platform

Change-Id: I57b82e8e836e3ee798c026d3aa43fb8ab969e2c6
Signed-off-by: Schumi Chu <schumi.chu@mitaccomputing.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88975
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
This commit is contained in:
Schumi Chu 2025-08-28 11:27:35 +08:00 • committed by Matt DeVillier
commit f02e755364
2 changed files with 0 additions and 16 deletions
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8
configs/builder/config.mitaccomputing.r520g6sb
View file

@ -15,8 +15,6 @@ CONFIG_NO_GFX_INIT=y
CONFIG_HAVE_IFD_BIN=y CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_PBP_BIN=n CONFIG_HAVE_PBP_BIN=n
CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
CONFIG_UART_FOR_CONSOLE=0 CONFIG_UART_FOR_CONSOLE=0
@ -29,12 +27,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_65536=y
# #
CONFIG_IFD_BIN_PATH="site-local/r520g6sb/descriptor.bin" CONFIG_IFD_BIN_PATH="site-local/r520g6sb/descriptor.bin"
CONFIG_PBP_BIN_PATH="" CONFIG_PBP_BIN_PATH=""
CONFIG_CPU_UCODE_BINARIES="site-local/r520g6sb/ucode.mcb"
CONFIG_FSP_T_FILE="site-local/r520g6sb/Server_T.fd"
CONFIG_FSP_M_FILE="site-local/r520g6sb/Server_M.fd"
CONFIG_FSP_S_FILE="site-local/r520g6sb/Server_S.fd"
CONFIG_FSP_HEADER_PATH="src/vendorcode/intel/fsp/fsp2_0/graniterapids/sp/"
CONFIG_PAYLOAD_FILE="site-local/r520g6sb/bzImage" CONFIG_PAYLOAD_FILE="site-local/r520g6sb/bzImage"
CONFIG_LINUX_COMMAND_LINE="loglevel=7 earlyprintk=serial,ttyS0,115200 console=ttyS0,115200" CONFIG_LINUX_COMMAND_LINE="loglevel=7 earlyprintk=serial,ttyS0,115200 console=ttyS0,115200"

8
configs/builder/config.mitaccomputing.sc513g6
View file

@ -15,8 +15,6 @@ CONFIG_NO_GFX_INIT=y
CONFIG_HAVE_IFD_BIN=y CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_PBP_BIN=n CONFIG_HAVE_PBP_BIN=n
CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
CONFIG_UART_FOR_CONSOLE=0 CONFIG_UART_FOR_CONSOLE=0
@ -29,12 +27,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_65536=y
# #
CONFIG_IFD_BIN_PATH="site-local/sc513g6/descriptor.bin" CONFIG_IFD_BIN_PATH="site-local/sc513g6/descriptor.bin"
CONFIG_PBP_BIN_PATH="" CONFIG_PBP_BIN_PATH=""
CONFIG_CPU_UCODE_BINARIES="site-local/sc513g6/ucode.mcb"
CONFIG_FSP_T_FILE="site-local/sc513g6/Server_T.fd"
CONFIG_FSP_M_FILE="site-local/sc513g6/Server_M.fd"
CONFIG_FSP_S_FILE="site-local/sc513g6/Server_S.fd"
CONFIG_FSP_HEADER_PATH="src/vendorcode/intel/fsp/fsp2_0/graniterapids/sp/"
CONFIG_PAYLOAD_FILE="site-local/sc513g6/bzImage" CONFIG_PAYLOAD_FILE="site-local/sc513g6/bzImage"
CONFIG_LINUX_COMMAND_LINE="loglevel=7 earlyprintk=serial,ttyS0,115200 console=ttyS0,115200" CONFIG_LINUX_COMMAND_LINE="loglevel=7 earlyprintk=serial,ttyS0,115200 console=ttyS0,115200"