coreboot/configs/builder/config.mitaccomputing.r520g6sb
Schumi Chu f02e755364 config/builder/mitac: Hook up public FSP repo and microcode
For following Mitac Computing platforms:
  sc513g6 and r520g6sb

TEST=Build and boot on Mitac Computing/sc513g6 platform
TEST=Build and boot on Mitac Computing/r520g6sb platform

Change-Id: I57b82e8e836e3ee798c026d3aa43fb8ab969e2c6
Signed-off-by: Schumi Chu <schumi.chu@mitaccomputing.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88975
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
2025-08-30 13:56:13 +00:00

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# Type this in coreboot root directory to get a working .config:
# make defconfig KBUILD_DEFCONFIG=configs/builder/config.mitaccomputing.sc513g6
#
# [RO] Board Configurations
#
CONFIG_VENDOR_MITAC_COMPUTING=y
CONFIG_BOARD_MITAC_COMPUTING_R520G6SB=y
CONFIG_HAVE_CONFIGURABLE_RAMSTAGE=y
CONFIG_CONFIGURABLE_RAMSTAGE=y
CONFIG_NO_GFX_INIT=y
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_PBP_BIN=n
CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y
CONFIG_PAYLOAD_LINUX=y
CONFIG_UART_FOR_CONSOLE=0
CONFIG_CONSOLE_SERIAL_115200=y
CONFIG_COREBOOT_ROMSIZE_KB_65536=y
#
# [RW] IFWI Ingredients
#
CONFIG_IFD_BIN_PATH="site-local/r520g6sb/descriptor.bin"
CONFIG_PBP_BIN_PATH=""
CONFIG_PAYLOAD_FILE="site-local/r520g6sb/bzImage"
CONFIG_LINUX_COMMAND_LINE="loglevel=7 earlyprintk=serial,ttyS0,115200 console=ttyS0,115200"
#
# [RW] Debug Settings
#
CONFIG_CONSOLE_POST=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
CONFIG_VERIFY_HOBS=y
CONFIG_DISPLAY_MTRRS=y
CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y
CONFIG_DISPLAY_FSP_HEADER=y
CONFIG_HAVE_DEBUG_GPIO=y
CONFIG_DEBUG_GPIO=y