For stefan

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1052 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-11-25 20:18:27 +00:00
commit ef9da5662d
2 changed files with 47 additions and 0 deletions

View file

@ -208,6 +208,11 @@ void hardware_stage1(void)
void early_superio_config_w83627thg(void);
void ich7_enable_lpc(void);
int boot_mode = 0;
/* hack */
pci_conf1_write_config32(PCI_BDF(0, 0x1f, 0), RCBA, DEFAULT_RCBA | 1);
/* Change port80 to LPC */
RCBA32(GCS) &= (~0x04);
/* end hack */
enable_lapic();

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@ -0,0 +1,42 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <types.h>
#include <lib.h>
#include <console.h>
#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <msr.h>
#include <io.h>
#include <pirq_routing.h>
#include <irq_tables.h>
#include "i82801gx.h"
/**
* Write_pirq_routing_table
* This is just a pass through for now, but it might have to change.
* All hooks for southbridge irq setup go here.
* See cs5536 for an example of how hooks can be put in.
*/
unsigned long write_pirq_routing_table(unsigned long addr)
{
return copy_pirq_routing_table(addr);
}