diff --git a/mainboard/kontron/986lcd-m/stage1.c b/mainboard/kontron/986lcd-m/stage1.c index 39d825f3f3..7be273e8c6 100644 --- a/mainboard/kontron/986lcd-m/stage1.c +++ b/mainboard/kontron/986lcd-m/stage1.c @@ -208,6 +208,11 @@ void hardware_stage1(void) void early_superio_config_w83627thg(void); void ich7_enable_lpc(void); int boot_mode = 0; + /* hack */ + pci_conf1_write_config32(PCI_BDF(0, 0x1f, 0), RCBA, DEFAULT_RCBA | 1); + /* Change port80 to LPC */ + RCBA32(GCS) &= (~0x04); + /* end hack */ enable_lapic(); diff --git a/southbridge/intel/i82801gx/irq_tables.c b/southbridge/intel/i82801gx/irq_tables.c new file mode 100644 index 0000000000..4f976cb357 --- /dev/null +++ b/southbridge/intel/i82801gx/irq_tables.c @@ -0,0 +1,42 @@ +/* +* This file is part of the coreboot project. +* +* Copyright (C) 2007 Advanced Micro Devices, Inc. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "i82801gx.h" + +/** + * Write_pirq_routing_table + * This is just a pass through for now, but it might have to change. + * All hooks for southbridge irq setup go here. + * See cs5536 for an example of how hooks can be put in. + */ +unsigned long write_pirq_routing_table(unsigned long addr) +{ + return copy_pirq_routing_table(addr); + +}