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mb/google/rauru: Add pwrsel init in romstage

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BUG=b:317009620
TEST=build pass, reg set ok, log show:
PWR_SEL = 0x0
PWRSEL_CONFIG = 0x7fff

Change-Id: I37c0fb905f99491ca99f04bc5bfa6abfb1c01059
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85620
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jarried Lin 2024-12-17 19:03:20 +08:00 • committed by Yidi Lin
commit ea646c0514
1 changed files with 2 additions and 0 deletions
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2
src/mainboard/google/rauru/romstage.c
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@ -3,11 +3,13 @@
#include <arch/stages.h>
#include <soc/emi.h>
#include <soc/irq2axi.h>
#include <soc/mtk_pwrsel.h>
#include <soc/pcie.h>
void platform_romstage_main(void)
{
irq2axi_disable();
pwrsel_init();
mtk_dram_init();
if (CONFIG(PCI))